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SBACPAD
2005
IEEE
177views Hardware» more  SBACPAD 2005»
13 years 10 months ago
Automatic Data-Flow Graph Generation of MPI Programs
The Data-Flow Graph (DFG) of a parallel application is frequently used to take scheduling decisions, based on the information that it models (dependencies among the tasks and volu...
Rafael Ennes Silva, Guilherme P. Pezzi, Nicolas Ma...
SBACPAD
2005
IEEE
139views Hardware» more  SBACPAD 2005»
13 years 10 months ago
Chained In-Order/Out-of-Order DoubleCore Architecture
Complexity is one of the most important problems facing microarchitects. It is exacerbated by the application of optimizations, by scaling to higher issue widths and, in general, ...
Miquel Pericàs, Adrián Cristal, Rube...
SBACPAD
2005
IEEE
112views Hardware» more  SBACPAD 2005»
13 years 10 months ago
Cooperation of Neighboring PEs in Clustered Architectures
Clustered architectures which intend to process data within a localized PE are one of the approaches to increase the performance under the difficulties of the wire delay problems...
Yukinori Sato, Ken-ichi Suzuki, Tadao Nakamura
SBACPAD
2005
IEEE
110views Hardware» more  SBACPAD 2005»
13 years 10 months ago
Portable checkpointing and communication for BSP applications on dynamic heterogeneous Grid environments
Executing long-running parallel applications in Opportunistic Grid environments composed of heterogeneous, shared user workstations, is a daunting task. Machines may fail, become ...
Raphael Y. de Camargo, Fabio Kon, Alfredo Goldman
SBACPAD
2005
IEEE
111views Hardware» more  SBACPAD 2005»
13 years 10 months ago
VRM: A Failure-Aware Grid Resource Management System
Abstract— For resource management in Grid environments, advance reservations turned out to be very useful and hence are supported by a variety of Grid toolkits. However, failure ...
Lars-Olof Burchard, César A. F. De Rose, Ha...
SBACPAD
2005
IEEE
176views Hardware» more  SBACPAD 2005»
13 years 10 months ago
Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation
The time required to simulate a complete benchmark program using the cycle-accurate model of a microprocessor can be prohibitively high. One of the proposed methodologies, represe...
Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy Kuri...
SBACPAD
2005
IEEE
87views Hardware» more  SBACPAD 2005»
13 years 10 months ago
High Performance Computing in Science and Engineering
Peter W. Haas, Michael M. Resch