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ISLPED
1999
ACM
90views Hardware» more  ISLPED 1999»
13 years 9 months ago
Way-predicting set-associative cache for high performance and low energy consumption
This paper proposes a new approach using way prediction for achieving high performance and low energy consumption of set-associative caches. By accessing only a single cache way p...
Koji Inoue, Tohru Ishihara, Kazuaki Murakami
ISCA
2005
IEEE
115views Hardware» more  ISCA 2005»
13 years 10 months ago
The V-Way Cache: Demand Based Associativity via Global Replacement
As processor speeds increase and memory latency becomes more critical, intelligent design and management of secondary caches becomes increasingly important. The efficiency of curr...
Moinuddin K. Qureshi, David Thompson, Yale N. Patt
LCTRTS
2007
Springer
13 years 10 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
DATE
2008
IEEE
62views Hardware» more  DATE 2008»
13 years 11 months ago
Instruction Cache Energy Saving Through Compiler Way-Placement
Fetching instructions from a set-associative cache in an embedded processor can consume a large amount of energy due to the tag checks performed. Recent proposals to address this ...
Timothy M. Jones, Sandro Bartolini, Bruno De Bus, ...