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ATVA
2011
Springer
295views Hardware» more  ATVA 2011»
5 years 11 months ago
Parallel Nested Depth-First Searches for LTL Model Checking
Even though the well-known nested-depth first search algorithm for LTL model checking provides good performance, it cannot benefit from the recent advent of multi-core computers....
Sami Evangelista, Laure Petrucci, Samir Youcef
DC
2010
6 years 8 months ago
Rambo: a robust, reconfigurable atomic memory service for dynamic networks
In this paper, we present RAMBO, an algorithm for emulating a read/write distributed shared memory in a dynamic, rapidly changing environment. RAMBO provides a highly reliable, hi...
Seth Gilbert, Nancy A. Lynch, Alexander A. Shvarts...
IPPS
2010
IEEE
6 years 8 months ago
Efficient hardware support for the Partitioned Global Address Space
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
Holger Fröning, Heiner Litz
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
6 years 9 months ago
Scalable Speculative Parallelization on Commodity Clusters
While clusters of commodity servers and switches are the most popular form of large-scale parallel computers, many programs are not easily parallelized for execution upon them. In...
Hanjun Kim, Arun Raman, Feng Liu, Jae W. Lee, Davi...
STTT
2010
115views more  STTT 2010»
6 years 9 months ago
Scalable shared memory LTL model checking
Recent development in computer hardware has brought more wide-spread emergence of shared memory, multi-core systems. These architectures offer opportunities to speed up various ta...
Jiri Barnat, Lubos Brim, Petr Rockai
SAS
2010
Springer
262views Formal Methods» more  SAS 2010»
6 years 9 months ago
Concurrent Separation Logic for Pipelined Parallelization
Recent innovations in automatic parallelizing compilers are showing impressive speedups on multicore processors using shared memory with asynchronous channels. We have formulated a...
Christian J. Bell, Andrew W. Appel, David Walker
PVM
2010
Springer
6 years 9 months ago
Locality and Topology Aware Intra-node Communication among Multicore CPUs
A major trend in HPC is the escalation toward manycore, where systems are composed of shared memory nodes featuring numerous processing units. Unfortunately, with scale comes compl...
Teng Ma, George Bosilca, Aurelien Bouteiller, Jack...
MAM
2002
151views more  MAM 2002»
6 years 11 months ago
A performance evaluation of cache injection in bus-based shared memory multiprocessors
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
Aleksandar Milenkovic, Veljko M. Milutinovic
COMPUTER
1998
94views more  COMPUTER 1998»
6 years 11 months ago
Multiprocessors Should Support Simple Memory-Consistency Models
provide tools or abstractions that allow developers to program in parallel. But what hardware do we need to support shared memory threads? The hardware should provide a well-defin...
Mark D. Hill
SIGMETRICS
2000
ACM
111views Hardware» more  SIGMETRICS 2000»
6 years 11 months ago
AMVA techniques for high service time variability
Motivated by experience gained during the validation of a recent Approximate Mean Value Analysis (AMVA) model of modern shared memory architectures, this paper re-examines the &qu...
Derek L. Eager, Daniel J. Sorin, Mary K. Vernon
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