A fast asynchronous shift register is used as the serializer and de-serializer in a novel bit-serial on-chip communication link. The link employs two-phase transition-based LEDR e...
Rostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Ko...
We consider the filter generator over GF(2m ) consisting of a linear feedback shift register of length k that generates a maximal length linear sequence of period 2mk − 1 over G...
—This paper shows that, for a given power budget, a shift register based multi-phase clock generator (MPCG) generates less jitter than a delay-locked loop (DLL) equivalent when b...