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    CSREAESA
    2006
    134views Embedded Systems» more  CSREAESA 2006»
    Novel and Efficient 4: 2 and 5: 2 Compressors with Minimum Number of Transistors Designed for Low-Power Operations
    13 years 6 months ago
    Novel and Efficient 4: 2 and 5: 2 Compressors with Minimum Number of Transistors Designed for Low-Power Operations
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    This paper proposes efficient and optimal 4:2 and 5:2 compressors. The compressors are highly optimized in terms of transistor count. These designs have the principle advantage th...
    Pallavi Devi Gopineedi, Himanshu Thapliyal, M. B. ...
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    DAC
    1999
    ACM
    179views Computer Architecture» more  DAC 1999»
    A Practical Gate Resizing Technique Considering Glitch Reduction for Low Power Design
    14 years 5 months ago
    A Practical Gate Resizing Technique Considering Glitch Reduction for Low Power Design
    Download  www-ise2.ist.osaka-u.ac.jp
    We propose a method for power optimization that considers glitch reduction by gate sizing based on the statistical estimation of glitch transitions. Our method reduces not only th...
    Masanori Hashimoto, Hidetoshi Onodera, Keikichi Ta...
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