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GLVLSI
2010
IEEE
154views VLSI» more  GLVLSI 2010»
10 years 1 months ago
Resource-constrained timing-driven link insertion for critical delay reduction
For timing-driven or yield-driven designs, non-tree routing has become more and more popular and additional loops provide the redundant paths to protect against the effect of the ...
Jin-Tai Yan, Zhi-Wei Chen
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