Sciweavers

ASPLOS
1998
ACM
13 years 7 months ago
Fast Out-Of-Order Processor Simulation Using Memoization
Our new out-of-order processor simulator, FastSim, uses two innovations to speed up simulation 8–15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First...
Eric Schnarr, James R. Larus
FDL
2007
IEEE
13 years 10 months ago
Modelling Alternatives for Cycle Approximate Bus TLMs
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
Martin Radetzki, Rauf Salimi Khaligh
ICCAD
2004
IEEE
139views Hardware» more  ICCAD 2004»
14 years 15 days ago
Fast simulation of VLSI interconnects
This paper introduces an efficient and accurate interconnect simulation technique. A new formulation for typical VLSI interconnect structures is proposed which, in addition to pr...
Jitesh Jain, Cheng-Kok Koh, Venkataramanan Balakri...