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IJES
2008
76views more  IJES 2008»
11 years 1 months ago
SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends
: Current and future SoC designs will contain an increasing number of programmable units. To be able to tailor and debug these processors in their system context at the highest pos...
Andreas Wieferink, Tim Kogel, Olaf Zerres, Rainer ...
DATE
2004
IEEE
120views Hardware» more  DATE 2004»
11 years 5 months ago
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems
This paper evaluates the use of pin and cycle accurate SystemC models for embedded system design exploration and early software development. The target system is MicroBlaze Vanill...
Tero Rissa, Adam Donlin, Wayne Luk
ICCD
1996
IEEE
145views Hardware» more  ICCD 1996»
11 years 5 months ago
Can Trace-Driven Simulators Accurately Predict Superscalar Performance?
There are four crucial issues associated with performance simulators: simulator retargetability, simulator validation, simulation speed and simulation accuracy. This paper documen...
Bryan Black, Andrew S. Huang, Mikko H. Lipasti, Jo...
DAC
1997
ACM
11 years 5 months ago
A C-Based RTL Design Verification Methodology for Complex Microprocessor
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon ...
DATE
1997
IEEE
107views Hardware» more  DATE 1997»
11 years 5 months ago
Acceleration of behavioral simulation on simulation specific machines
Behavioral simulation is faster than gate-level logic simulation, however, the simulation speed is too slow for large systems. Simulation specific machines accelerated simulation ...
Minoru Shoji, Fumiyasu Hirose, Shintaro Shimogori,...
CODES
2007
IEEE
11 years 7 months ago
HySim: a fast simulation framework for embedded software development
Instruction Set Simulation (ISS) is widely used in system evaluation and software development for embedded processors. Despite the significant advancements in the ISS technology,...
Stefan Kraemer, Lei Gao, Jan Weinstock, Rainer Leu...
DATE
2009
IEEE
126views Hardware» more  DATE 2009»
11 years 8 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...
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