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    GLVLSI
    1999
    IEEE
    105views VLSI» more  GLVLSI 1999»
    Area-Efficient Area Pad Design for High Pin-Count Chips
    13 years 8 months ago
    Area-Efficient Area Pad Design for High Pin-Count Chips
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    This paper presents an area pad layout method to e ciently reduce the space required for interconnection pads and pad drivers. Unlike peripheral pads, area pads use only the top m...
    Louis Luh, John Choma Jr., Jeffrey T. Draper
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