Sciweavers

APCSAC
2000
IEEE
13 years 8 months ago
Cost/Performance Tradeoff of n-Select Square Root Implementations
Hardware square-root units require large numbers of gates even for iterative implementations. In this paper, we present four low-cost high-performance fullypipelined n-select impl...
Wanming Chu, Yamin Li
ARITH
2007
IEEE
13 years 10 months ago
P6 Binary Floating-Point Unit
The floating point unit of the next generation PowerPC is detailed. It has been tested at over 5 GHz. The design supports an extremely aggressive cycle time of 13 FO4 using a tech...
Son Dao Trong, Martin S. Schmookler, Eric M. Schwa...
IWDW
2009
Springer
13 years 10 months ago
Estimating the Information Theoretic Optimal Stego Noise
We recently developed a new benchmark for steganography, underpinned by the square root law of capacity, called Steganographic Fisher Information (SFI). It is related to the multip...
Andrew D. Ker