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    DATE
    2008
    IEEE
    118views Hardware» more  DATE 2008»
    Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices
    13 years 6 months ago
    Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices
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    Advanced MOSFETs such as Strained Silicon (SS) devices have emerged as critical enablers to keep Moore's law on track for sub100nm technologies. Use of Strained Silicon devic...
    Ashutosh Chakraborty, Sean X. Shi, David Z. Pan
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