Sciweavers

ISCAS
2003
IEEE
105views Hardware» more  ISCAS 2003»
13 years 10 months ago
Algorithmic partial analog-to-digital conversion in mixed-signal array processors
We present an algorithmic analog-to-digital converter (ADC) architecture for large-scale parallel quantization of internally analog variables in externally digital array processor...
Roman Genov, Gert Cauwenberghs