VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE
A novel design approach for simultaneous power and stability (static noise margin, SNM) optimization of nanoCMOS static random access memory (SRAM) is presented. A 45nm single-end...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract— This paper presents a six-transistor (6T) singleended static random access memory (SE-SRAM) bitcell with an isolated read-port, suitable for low-Î and low-power embedd...