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    ASPDAC
    2004
    ACM
    144views Hardware» more  ASPDAC 2004»
    Verification of timed circuits with symbolic delays
    13 years 8 months ago
    Verification of timed circuits with symbolic delays
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    When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
    Robert Clarisó, Jordi Cortadella
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