Sciweavers

PROCEDIA
2010
148views more  PROCEDIA 2010»
12 years 11 months ago
SysCellC: a data-flow programming model on multi-GPU
High performance computing with low cost machines becomes a reality with GPU. Unfortunately, high performances are achieved when the programmer exploits the architectural specific...
Dominique Houzet, Sylvain Huet, Anis Rahman
SIES
2010
IEEE
13 years 2 months ago
Verification of a CAN bus model in SystemC with functional coverage
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
Christoph Kuznik, Gilles B. Defo, Wolfgang Mü...
MEMOCODE
2010
IEEE
13 years 2 months ago
Monitoring temporal SystemC properties
Monitoring temporal SystemC properties is crucial for the validation of functional and transaction-level models, yet the current SystemC standard provides no support for temporal s...
Deian Tabakov, Moshe Y. Vardi
EMSOFT
2010
Springer
13 years 2 months ago
PinaVM: a systemC front-end based on an executable intermediate representation
SystemC is the de facto standard for modeling embedded systems. It allows system design at various levels of abstractions, provides typical object-orientation features and incorpo...
Kevin Marquet, Matthieu Moy
DAC
2010
ACM
13 years 3 months ago
SCEMIT: a systemc error and mutation injection tool
As high-level models in C and SystemC are increasingly used for verification and even design (through high-level synthesis) of electronic systems, there is a growing need for com...
Peter Lisherness, Kwang-Ting (Tim) Cheng
SIMVIS
2004
13 years 5 months ago
A Formal Model of a Framework for Simulation-Based Animation
We present a rigorous formal - but transparent - specification of the semantics of a generic simulation-based 3D animation framework. Our system combines a SystemC simulation kern...
Wolfgang Müller 0003, Volker Paelke
FM
2008
Springer
127views Formal Methods» more  FM 2008»
13 years 6 months ago
A Schedulerless Semantics of TLM Models Written in SystemC Via Translation into LOTOS
TLM (Transaction-Level Modeling) was introduced to cope with the increasing complexity of Systems-on-Chip designs by raising the modeling level. Currently, TLM is primarily used fo...
Olivier Ponsini, Wendelin Serwe
CODES
2008
IEEE
13 years 6 months ago
Model checking SystemC designs using timed automata
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Paula Herber, Joachim Fellmuth, Sabine Glesner
FDL
2004
IEEE
13 years 8 months ago
Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems
gn process of embedded systems moves currently towards higher levels of abstraction. As a consequence, a need arises for an early and realistic assessment of system level design d...
P. Hastono, Stephan Klaus, Sorin A. Huss
ISCAS
2003
IEEE
135views Hardware» more  ISCAS 2003»
13 years 9 months ago
Formal verification of LTL formulas for SystemC designs
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
Daniel Große, Rolf Drechsler