Sciweavers

Share
TCAD
2008
112views more  TCAD 2008»
8 years 5 months ago
A High-Performance Droplet Routing Algorithm for Digital Microfluidic Biochips
In this paper, we propose a high-performance droplet router for a digital microfluidic biochip (DMFB) design. Due to recent advancements in the biomicroelectromechanical system and...
Minsik Cho, David Z. Pan
TCAD
2008
110views more  TCAD 2008»
8 years 5 months ago
A Reactive and Cycle-True IP Emulator for MPSoC Exploration
The design of MultiProcessor Systems-on-Chip (MPSoC) emphasizes intellectual-property (IP)-based communication-centric approaches. Therefore, for the optimization of the MPSoC inte...
Shankar Mahadevan, Federico Angiolini, Jens Spars&...
TCAD
2008
89views more  TCAD 2008»
8 years 6 months ago
Scan Architecture With Align-Encode
Ozgur Sinanoglu
TCAD
2008
92views more  TCAD 2008»
8 years 6 months ago
IP Watermarking Using Incremental Technology Mapping at Logic Synthesis Level
Abstract--This paper proposes an adaptive watermarking technique by modulating some closed cones in an originally optimized logic network (master design) for technology mapping. Th...
Aijiao Cui, Chip-Hong Chang, Sofiène Tahar
TCAD
2008
81views more  TCAD 2008»
8 years 7 months ago
Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring
The relatively poor scaling of interconnect in modern digital circuits necessitates a number of design optimizations, which must typically be iterated several times to meet the spe...
Stephen Plaza, Igor L. Markov, Valeria Bertacco
TCAD
2008
215views more  TCAD 2008»
8 years 7 months ago
Total Energy Minimization of Real-Time Tasks in an On-Chip Multiprocessor Using Dynamic Voltage Scaling Efficiency Metric
Abstract--This paper proposes an algorithm that provides both dynamic voltage scaling and power shutdown to minimize the total energy consumption of an application executed on an o...
Hyunjin Kim, Hyejeong Hong, Hong-Sik Kim, Jin-Ho A...
TCAD
2008
68views more  TCAD 2008»
8 years 7 months ago
Highly Efficient Gradient Computation for Density-Constrained Analytical Placement
Abstract--Recent analytical global placers use density constraints to approximate nonoverlap constraints, and these show very successful results. This paper unifies a wide range of...
Jason Cong, Guojie Luo, Eric Radke
TCAD
2008
114views more  TCAD 2008»
8 years 7 months ago
RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm
Physical synthesis tools are responsible for achieving timing closure. Starting with 130nm designs, multiple cycles are required to cross the chip, making latch placement critical...
David A. Papa, Tao Luo, Michael D. Moffitt, Chin-N...
TCAD
2008
96views more  TCAD 2008»
8 years 7 months ago
An Implicit Approach to Minimizing Range-Equivalent Circuits
Abstract--Simplifying a combinational circuit while preserving its range has a variety of applications, such as combinational equivalence checking and random simulation. Previous a...
Yung-Chih Chen, Chun-Yao Wang
TCAD
2008
103views more  TCAD 2008»
8 years 7 months ago
Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems
Latency-insensitive protocols allow system-on-chip (SoC) engineers to decouple the design of the computing cores from the design of the intercore communication channels while follo...
Rebecca L. Collins, Luca P. Carloni
books