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TCAD
2008
133views more  TCAD 2008»
9 years 3 months ago
Metal-Density-Driven Placement for CMP Variation and Routability
In this paper, we propose the first metal-density driven placement algorithm to reduce CMP variation and achieve higher routability. Based on an analytical placement framework, we...
Tung-Chieh Chen, Minsik Cho, David Z. Pan, Yao-Wen...
TCAD
2008
115views more  TCAD 2008»
9 years 3 months ago
Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories
Abstract--The fabrication of crossbar memories with sublithographic features is expected to be feasible within several emerging technologies; in all of them, the nanowire (NW) deco...
M. Haykel Ben Jamaa, Kirsten E. Moselund, David At...
TCAD
2008
195views more  TCAD 2008»
9 years 3 months ago
Multilayer Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Spanning Graphs
Given a set of pins and a set of obstacles on routing layers, a multilayer obstacle-avoiding rectilinear Steiner minimal tree (ML-OARSMT) connects these pins by rectilinear edges w...
Chung-Wei Lin, Shih-Lun Huang, Kai-Chi Hsu, Meng-X...
TCAD
2008
84views more  TCAD 2008»
9 years 3 months ago
Buffering Interconnect for Multicore Processor Designs
Recently, the microprocessor industry is headed in the direction of multicore designs in order to continue the chip performance growth. We investigate buffer insertion, which is a ...
Yifang Liu, Jiang Hu, Weiping Shi
TCAD
2008
119views more  TCAD 2008»
9 years 3 months ago
Energy and Performance Optimization of Demand Paging With OneNAND Flash
New fusion memory devices consisting of multiple heterogeneous memory components in a single die or package offer efficient ways to optimize embedded systems in terms of energy, pe...
Yongsoo Joo, Yongseok Choi, Jaehyun Park, Chanik P...
TCAD
2008
93views more  TCAD 2008»
9 years 3 months ago
Transforming Cyclic Circuits Into Acyclic Equivalents
Abstract--Designers and high-level synthesis tools can introduce unwanted cycles in digital circuits, and for certain combinational functions, cyclic circuits that are stable and d...
Osama Neiroukh, Stephen A. Edwards, Xiaoyu Song
TCAD
2008
112views more  TCAD 2008»
9 years 3 months ago
Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Yu Hu, Victor Shih, Rupak Majumdar, Lei He
TCAD
2008
120views more  TCAD 2008»
9 years 3 months ago
Charge Recycling in Power-Gated CMOS Circuits
Abstract--Design of a suitable power gating (e.g., multithreshold CMOS or super cutoff CMOS) structure is an important and challenging task in sub-90nm VLSI circuits where leakage ...
Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram
TCAD
2008
172views more  TCAD 2008»
9 years 3 months ago
General Methodology for Soft-Error-Aware Power Optimization Using Gate Sizing
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
Foad Dabiri, Ani Nahapetian, Tammara Massey, Miodr...
TCAD
2008
114views more  TCAD 2008»
9 years 3 months ago
Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
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