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ISMVL
2007
IEEE
106views Hardware» more  ISMVL 2007»
13 years 11 months ago
Fast Addition Using Balanced Ternary Counters Designed with CMOS Semi-Floating Gate Devices
This paper presents ternary counters using balanced ternary notation. The balanced ternary counters can replace binary full adders or counters in fast adder structures. The circui...
Henning Gundersen, Yngvar Berg