ATS
2001
IEEE
13 years 8 months ago
2001
IEEE
Test access is a major problem for core-based systemon-chip (SOC) designs. Since cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms...
VLSID
2002
IEEE
14 years 4 months ago
2002
IEEE
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
DAC
2000
ACM
14 years 5 months ago
2000
ACM
A major challenge in realizing core-based system chips is the adoption and design-in of adequate test and diagnosis strategies. This tutorial paper discusses the specific challeng...