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VLSID
2002
IEEE
78views VLSI» more  VLSID 2002»
14 years 4 months ago
Optimization of Test Accesses with a Combined BIST and External Test Scheme
External pins for test are precious hardware resources because this number is strongly restricted. Cores are tested via test access mechanisms (TAMs) such as a test bus architectu...
Makoto Sugihara, Hiroto Yasuura