Sciweavers

DATE
2004
IEEE
120views Hardware» more  DATE 2004»
13 years 8 months ago
Pattern Selection for Testing of Deep Sub-Micron Timing Defects
Due to process variations in deep sub-micron (DSM) technologies, the effects of timing defects are difficult to capture. This paper presents a novel coverage metric for estimating...
Mango Chia-Tso Chao, Li-C. Wang, Kwang-Ting Cheng
DATE
2010
IEEE
185views Hardware» more  DATE 2010»
13 years 9 months ago
Adapting to adaptive testing
Adaptive testing is a generic term for a number of techniques which aim at improving the test quality and/or reducing the test application costs. In adaptive tests, the test conte...
Erik Jan Marinissen, Adit Singh, Dan Glotter, Marc...
ITC
2003
IEEE
132views Hardware» more  ITC 2003»
13 years 9 months ago
Industrial Experience with Adoption of EDT for Low-Cost Test without Concessions
This paper discusses the adoption of Embedded Deterministic Test (EDT) at Infineon Technologies as a means to reduce the cost of manufacturing test without compromising test quali...
Frank Poehl, Matthias Beck, Ralf Arnold, Peter Muh...
VLSI
2005
Springer
13 years 9 months ago
Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
1 The increasing test data volume required to ensure high test quality when testing a System-on-Chip is becoming a problem since it (the test data volume) must fit the ATE (Automa...
Erik Larsson, Stina Edbom
DAC
2006
ACM
14 years 5 months ago
Unknown-tolerance analysis and test-quality control for test response compaction using space compactors
For a space compactor, degradation of fault detection capability caused by the masking effects from unknown values is much more serious than that caused by error masking (i.e. ali...
Mango Chia-Tso Chao, Kwang-Ting Cheng, Seongmoon W...