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EURODAC
1994
IEEE
148views VHDL» more  EURODAC 1994»
10 years 2 days ago
BiTeS: a BDD based test pattern generator for strong robust path delay faults
This paper presents an algorithm for generation of test patterns for strong robust path delay faults, i.e. tests that propagate the fault along a single path and additionally are ...
Rolf Drechsler
ATS
1998
IEEE
76views Hardware» more  ATS 1998»
10 years 6 days ago
Partitioning and Reordering Techniques for Static Test Sequence Compaction of Sequential Circuits
We propose a new static test set compaction method based on a careful examination of attributes of fault coverage curves. Our method is based on two key ideas: 1 fault-list and te...
Michael S. Hsiao, Srimat T. Chakradhar
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