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ISLPED
2006
ACM
99views Hardware» more  ISLPED 2006»
13 years 9 months ago
Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power
All existing methods for thermal-via allocation are based on a steady-state thermal analysis and may lead to excessive number of thermal vias. This paper develops an accurate and ...
Hao Yu, Yiyu Shi, Lei He, Tanay Karnik
ASPDAC
2006
ACM
166views Hardware» more  ASPDAC 2006»
13 years 9 months ago
Temperature-aware routing in 3D ICs
Three-dimensional integrated circuits (3D ICs) provide an attractive solution for improving circuit performance. Such solutions must be embedded in an electrothermally-conscious d...
Tianpei Zhang, Yong Zhan, Sachin S. Sapatnekar
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
13 years 9 months ago
3D floorplanning with thermal vias
Abstract— 3D circuits have the potential to improve performance over traditional 2D circuits by reducing wirelength and interconnect delay. One major problem with 3D circuits is ...
Eric Wong, Sung Kyu Lim
ICCD
2007
IEEE
139views Hardware» more  ICCD 2007»
14 years 16 days ago
Whitespace redistribution for thermal via insertion in 3D stacked ICs
One of the biggest challenges in 3D stacked IC design is heat dissipation. Incorporating thermal vias is a promising method for reducing the temperatures of 3D ICs. The bonding st...
Eric Wong, Sung Kyu Lim