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ISLPED
1999
ACM
177views Hardware» more  ISLPED 1999»
10 years 7 months ago
Low power synthesis of dual threshold voltage CMOS VLSI circuits
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
Vijay Sundararajan, Keshab K. Parhi
ISLPED
2005
ACM
85views Hardware» more  ISLPED 2005»
10 years 8 months ago
Low-power fanout optimization using multiple threshold voltage inverters
This paper addresses the problem of low-power fanout optimization with multiple threshold voltage inverters. Introducing splitting and merging conversions that preserve delay, pow...
Behnam Amelifard, Farzan Fallah, Massoud Pedram
ISQED
2006
IEEE
176views Hardware» more  ISQED 2006»
10 years 9 months ago
Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
Zhiyu Liu, Volkan Kursun
ISQED
2006
IEEE
107views Hardware» more  ISQED 2006»
10 years 9 months ago
Impact of Gate-Length Biasing on Threshold-Voltage Selection
Gate-length biasing is a runtime leakage reduction technique that leverages on the short-channel effect by marginally increasing the gate-length of MOS devices to significantly ...
Andrew B. Kahng, Swamy Muddu, Puneet Sharma
GLVLSI
2009
IEEE
167views VLSI» more  GLVLSI 2009»
10 years 9 months ago
Dual-threshold pass-transistor logic design
This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are imp...
Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. ...
ICCAD
2003
IEEE
149views Hardware» more  ICCAD 2003»
10 years 11 months ago
Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module L
This paper proposes an optimum methodology for assigning supply and threshold voltages to modules in a CMOS circuit such that the overall energy consumption is minimized for a giv...
Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhij...
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