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ISLPED
1997
ACM
96views Hardware» more  ISLPED 1997»
13 years 9 months ago
Re-mapping for low power under tight timing constraints
In this paper1 we propose a novel approach to synthesis for low power under tight timing constraints. Starting from a mapped netlist, we apply a powerful generalized matching algo...
Patrick Vuillod, Luca Benini, Giovanni De Micheli
ISSS
1999
IEEE
85views Hardware» more  ISSS 1999»
13 years 9 months ago
Efficient Scheduling of DSP Code on Processors with Distributed Register Files
Code generation methods for digital signal processors are increasingly hampered by the combination of tight timing constraints imposed by the algorithms and the limited capacity o...
Bart Mesman, Carlos A. Alba Pinto, Koen Van Eijk