ISCA
2012
IEEE
11 years 7 months ago
2012
IEEE
Modern DRAMs have multiple banks to serve multiple memory requests in parallel. However, when two requests go to the same bank, they have to be served serially, exacerbating the h...
TCAD
1998
13 years 4 months ago
1998
— We introduce a transformation, named rephasing, that manipulates the timing parameters in control-data-flow graphs (CDFG’s) during the high-level synthesis of data-pathinten...
DAC
1995
ACM
13 years 8 months ago
1995
ACM
- We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs. Traditionally high-level synthesis systems for DSP have either ...