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EURODAC
1994
IEEE
117views VHDL» more  EURODAC 1994»
8 years 9 months ago
Logic and Fault Simulation by Cellular Automata
Yih-Lang Li, Cheng-Wen Wu
EURODAC
1994
IEEE
112views VHDL» more  EURODAC 1994»
8 years 9 months ago
Minimizing ROBDD Size of Incompletely Specified Multiple Output Functions
Shih-Chieh Chang, David Ihsin Cheng, Malgorzata Ma...
EURODAC
1994
IEEE
149views VHDL» more  EURODAC 1994»
8 years 9 months ago
A Graphical Approach to Analogue Behavioural Modelling
In order to master the growing complexity of analogue electronic systems, modelling and simulation of analogue hardware at various levels is absolutely necessary. This paper prese...
Vincent Moser, Pascal Nussbaum, Hans Peter Amann, ...
EURODAC
1994
IEEE
94views VHDL» more  EURODAC 1994»
8 years 9 months ago
A Study of Undetectable Non-Feedback Shorts for the Purpose of Physical-DFT
Undetectable shorts may decrease the long term reliability of a circuit, cause intermittent failures, add noise and delay, or increase test pattern generation costs. This paper de...
Richard McGowen, F. Joel Ferguson
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
8 years 10 months ago
Parallel and Distributed VHDL Simulation
This paper presents a methodology for parallel and distributed simulation of VHDL using the PDES (parallel discrete-event simulation) paradigm. To achieve better features and perf...
Dragos Lungeanu, C.-J. Richard Shi
DATE
2000
IEEE
139views Hardware» more  DATE 2000»
8 years 10 months ago
A VHDL Error Simulator for Functional Test Generation
This paper describes an efficient error simulator able to analyze functional VHDL descriptions. The proposed simulation environment can be based on commercial VHDL simulators. Al...
Alessandro Fin, Franco Fummi

Book
334views
10 years 1 months ago
Application-Specific Integrated Circuits
"An ASIC (pronounced “a-sick”; bold typeface defines a new term) is an application-specific integrated circuit —at least that is what the acronym stands for. Before we a...
Michael John Sebastian Smith
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