Sciweavers

IPPS
1994
IEEE
13 years 8 months ago
Parallel Evaluation of a Parallel Architecture by Means of Calibrated Emulation
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
PODC
1997
ACM
13 years 8 months ago
Leap Forward Virtual Clock: A New Fair Queuing Scheme with Guaranteed Delays and Throughput Fairness
We describe an ejjicient fair queuing scheme, Leap Forward Virtual Clock, that provides end-to-end delay bounds simdar to WFQ, along with throughput fairness. Our scheme can be im...
Subhash Suri, George Varghese, Girish P. Chandranm...