In this article, we consider the estimation of exponential sums along the points of the reduction mod pm of a p-adic analytic submanifold of Zn p . More precisely, we extend Igusaâ...
Description logics (DLs) are widely employed in recent semantic web application systems. However, classical description logics are limited when dealing with imprecise concepts and ...
Abstract—Ballooning trafï¬c volumes and increasing linkspeeds require ever high compute power to perform complex real-time processing of network packets. FPGAs have already been...
Existing optimization algorithms for the multiplierless realization of multiple constant multiplications (MCM) typically target the minimization of the number of addition and subt...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
—String matching is a ubiquitous problem that arises in a wide range of applications in computing, e.g., packet routing, intrusion detection, web querying, and genome analysis. D...
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...