Sciweavers

VLSI
2007
Springer
13 years 11 months ago
Use of gray decoding for implementation of symmetric functions
— This paper discusses reduction of the number of product terms in representation of totally symmetric Boolean functions by Sum of Products (SOP) and Fixed Polarity ReedMuller (F...
Osnat Keren, Ilya Levin, Radomir S. Stankovic
VLSI
2007
Springer
13 years 11 months ago
Incremental placement for structured ASICs using the transportation problem
— While physically driven synthesis techniques have proven to be an effective method to meet tight timing constraints required by a design, the incremental placement step during ...
Andrew C. Ling, Deshanand P. Singh, Stephen Dean B...
VLSI
2007
Springer
13 years 11 months ago
An efficient H.264 intra frame coder system design
In this paper, we present an efficient H.264 / MPEG4 Part 10 Intra Frame Coder System. The system achieves real-time performance for portable applications with low hardware cost, ...
Ilker Hamzaoglu, Ozgur Tasdizen, Esra Sahin
VLSI
2007
Springer
13 years 11 months ago
Fast estimation of software energy consumption using IPI(Inter-Prefetch Interval) energy model
In this paper, we present the way of fast and accurate estimation of software energy consumption in off-the-shelf processor using IPI(Inter-Prefetch Interval) energy model. In ou...
Jungsoo Kim, Kyungsu Kang, Heejun Shim, Woong Hwan...
VLSI
2007
Springer
13 years 11 months ago
An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor
Replacing functional units of an extensible processor with reconfigurable functional units enhances performance and flexibility of processors to execute custom instructions. That ...
Arash Mehdizadeh, Behnam Ghavami, Morteza Saheb Za...
VLSI
2007
Springer
13 years 11 months ago
Parametric structure-preserving model order reduction
Abstract—Analysis and verification environments for nextgeneration nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects,...
Jorge Fernandez Villena, Wil H. A. Schilders, L. M...
VLSI
2007
Springer
13 years 11 months ago
Simulation of hybrid computer architectures: simulators, methodologies and recommendations
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
Pranav Vaidya, Jaehwan John Lee
VLSI
2007
Springer
13 years 11 months ago
Impact of hardware emulation on the verification quality improvement
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...
VLSI
2007
Springer
13 years 11 months ago
A low-power deblocking filter architecture for H.264 advanced video coding
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
Jaemoon Kim, Sangkwon Na, Chong-Min Kyung
VLSI
2007
Springer
13 years 11 months ago
SWORD: A SAT like prover using word level information
Robert Wille, Görschwin Fey, Daniel Groß...