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VLSID
2001
IEEE
144views VLSI» more  VLSID 2001»
14 years 4 months ago
Next Generation Network Processors
Networking hardware manufacturers face the dual demands of supporting ever increasing bandwidth requirements, while also delivering new features, such as the ability to implement ...
Deepak Kataria
VLSID
2001
IEEE
93views VLSI» more  VLSID 2001»
14 years 4 months ago
A Parallel Built-In Self-Diagnostic Method For Embedded Memory Buffers
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
14 years 4 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
VLSID
2001
IEEE
88views VLSI» more  VLSID 2001»
14 years 4 months ago
Switching Noise Analysis Framework For High Speed Logic Families
Marco Delaurenti, Mariagrazia Graziano, Guido Mase...
VLSID
2001
IEEE
82views VLSI» more  VLSID 2001»
14 years 4 months ago
Efficient Signature-Based Fault Diagnosis Using Variable Size Windows
A technique for signature based diagnosis using windows of different sizes is presented. It allows to obtain increased diagnostic information from a given test at a lower cost, wi...
Thomas Clouqueur, Ozen Ercevik, Kewal K. Saluja, H...
VLSID
2001
IEEE
98views VLSI» more  VLSID 2001»
14 years 4 months ago
Complexity Of Minimum-Delay Gate Resizing
Supratik Chakraborty, Rajeev Murgai
VLSID
2001
IEEE
82views VLSI» more  VLSID 2001»
14 years 4 months ago
High Level Synthesis Of Multi-Precision Data Flow Graphs
Vikas Agrawal, Anand Pande, Mahesh Mehendale