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VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
14 years 3 months ago
Address Code and Arithmetic Optimizations for Embedded Systems
An important class of problems used widely in both the embedded systems and scientific domains perform memory intensive computations on large data sets. These data sets get to be ...
J. Ramanujam, Satish Krishnamurthy, Jinpyo Hong, M...
VLSID
2002
IEEE
105views VLSI» more  VLSID 2002»
14 years 3 months ago
A Heuristic for Clock Selection in High-Level Synthesis
Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...
J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahm...
VLSID
2002
IEEE
83views VLSI» more  VLSID 2002»
14 years 3 months ago
Identifying Redundant Wire Replacements for Synthesis and Verification
We propose the redundancy identification of wire replacement faults. The solutions rely on the satisfiability (SAT) formulation of redundancy identification, augmented with the me...
Katarzyna Radecka, Zeljko Zilic
VLSID
2002
IEEE
115views VLSI» more  VLSID 2002»
14 years 3 months ago
A Partitioning and Storage Based Built-In Test Pattern Generation Method for Scan Circuits
We describe a built-in test pattern generation method for scan circuits. The method is based on partitioning and storage of test sets. Under this method, a precomputed test set is...
Irith Pomeranz, Sudhakar M. Reddy
VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
14 years 3 months ago
Automatic Model Refinement for Fast Architecture Exploration
We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An arch...
Junyu Peng, Samar Abdi, Daniel Gajski
VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
14 years 3 months ago
Development of ASIC Chip-Set for High-End Network Processing Application-A Case Study
Choosing the right methodology is a significant step towards successful VLSI designs. Traditional methodologies and tools are no longer adequate to handle large and complex design...
Sanjeev Patel
VLSID
2002
IEEE
114views VLSI» more  VLSID 2002»
14 years 3 months ago
Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-Chip (SoC) Applications
Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improve...
Yong-Ha Park, Jeonghoon Kook, Hoi-Jun Yoo
VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
14 years 3 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
VLSID
2002
IEEE
111views VLSI» more  VLSID 2002»
14 years 3 months ago
Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design
This paper presents the applicability of a cosimulation methodology based on an object-oriented simulation environment, to multi-domain and multi-language systems design. This met...
Ahmed Amine Jerraya, Benoît Charlot, Gabriel...
VLSID
2002
IEEE
94views VLSI» more  VLSID 2002»
14 years 3 months ago
Timing Yield Calculation Using an Impulse-Train Approach
This paper presents a new method to compute the probability distribution of the delay of a combinational circuit and uses it obtain an estimate of the yield of the process that ma...
Srinath R. Naidu