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VLSID
2002
IEEE
79views VLSI» more  VLSID 2002»
14 years 3 months ago
A Power Minimization Technique for Arithmetic Circuits by Cell Selection
As a basic cell of arithmetic circuits, a one-bit full adder and a counter are usually used. Minimizing power consumption of these components is a key issue for low-power circuit ...
Masanori Muroyama, Tohru Ishihara, Akihiko Hyodo, ...
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
14 years 3 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
14 years 3 months ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...
VLSID
2002
IEEE
87views VLSI» more  VLSID 2002»
14 years 3 months ago
Weight-Based Bus-Invert Coding for Low-Power Applications
Rung-Bin Lin, Chi-Ming Tsai
VLSID
2002
IEEE
92views VLSI» more  VLSID 2002»
14 years 3 months ago
Electromigration Avoidance in Analog Circuits: Two Methodologies for Current-Driven Routing
Interconnect with an insufficient width may be subject to electromigration and eventually cause the failure of the circuit at any time during its lifetime. This problem has gotten...
Jens Lienig, Goeran Jerke, Thorsten Adler
VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
14 years 3 months ago
Estimation of Maximum Power-Up Current
Power gating is emerging as a viable solution to reduction of leakage current. However, power gated circuits are different from the conventional designs in the sense that a power-...
Fei Li, Lei He, Kewal K. Saluja
VLSID
2002
IEEE
151views VLSI» more  VLSID 2002»
14 years 3 months ago
Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
Dexin Li, Pai H. Chou, Nader Bagherzadeh
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
14 years 3 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
VLSID
2002
IEEE
119views VLSI» more  VLSID 2002»
14 years 3 months ago
Reducing Library Development Cycle Time through an Optimum Layout Create Flow
One of the major roadblocks in reduction of library generation cycle time is the layout generation phase. The two methods of doing automatic layout generation are synthesis and mig...
Rituparna Mandal, Dibyendu Goswami, Arup Dash