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VLSID
2002
IEEE
160views VLSI» more  VLSID 2002»
14 years 3 months ago
PREDICTMOS MOSFET Model and its Application to Submicron CMOS Inverter Delay Analysis
Predictive delay analysis is presented for a representative CMOS inverter with submicron device size using PREDICTMOS MOSFET model. As against SPICE, which adopts a time consuming...
A. B. Bhattacharyya, Shrutin Ulman
VLSID
2002
IEEE
82views VLSI» more  VLSID 2002»
14 years 3 months ago
Improved Algorithms for Constructive Multi-Phase Test Point Insertion for Scan Based BIST
Nadir Z. Basturkmen, Sudhakar M. Reddy, Janusz Raj...
VLSID
2002
IEEE
120views VLSI» more  VLSID 2002»
14 years 3 months ago
Floorplan Evaluation with Timing-Driven Global Wireplanning, Pin Assignment and Buffer/Wire Sizing
We describe a new algorithm for floorplan evaluation using timing-driven buffered routing according to a prescribed buffer site map. Specifically, we describe a provably good mult...
Christoph Albrecht, Andrew B. Kahng, Ion I. Mandoi...
VLSID
2002
IEEE
125views VLSI» more  VLSID 2002»
14 years 3 months ago
Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...
Francisco Barat, Murali Jayapala, Pieter Op de Bee...
VLSID
2002
IEEE
129views VLSI» more  VLSID 2002»
14 years 3 months ago
Efficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis
In this paper, we explore the concept of using analytical models to efficiently generate delay change curves (DCCs) that can then be used to characterize the impact of noise on an...
Kanak Agarwal, Yu Cao, Takashi Sato, Dennis Sylves...
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
14 years 3 months ago
A Framework for Design Space Exploration of Parameterized VLSI Systems
The paper presents two new approaches to multiobjective design space exploration for parametric VLSI systems. Both considerably reduce the number of simulations needed to determin...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
VLSID
2002
IEEE
127views VLSI» more  VLSID 2002»
14 years 3 months ago
Switching Activity Estimation of Large Circuits using Multiple Bayesian Networks
Switching activity estimation is a crucial step in estimating dynamic power consumption in CMOS circuits. In [1], we proposed a new switching probability model based on Bayesian N...
Sanjukta Bhanja, N. Ranganathan