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VLSID
2005
IEEE
120views VLSI» more  VLSID 2005»
12 years 3 months ago
On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...
VLSID
2005
IEEE
170views VLSI» more  VLSID 2005»
12 years 3 months ago
A High-Efficiency, Dual-Mode, Dynamic, Buck-Boost Power Supply IC for Portable Applications
Abstract—Integrated power supplies are critical building blocks in stateof-the-art portable applications, where they efficiently and accurately transform a battery supply into va...
Biranchinath Sahu, Gabriel A. Rincón-Mora
VLSID
2005
IEEE
106views VLSI» more  VLSID 2005»
12 years 3 months ago
Moore's Law is Unconstitutional
Walden C. Rhines
VLSID
2005
IEEE
105views VLSI» more  VLSID 2005»
12 years 3 months ago
Placement and Routing for 3D-FPGAs Using Reinforcement Learning and Support Vector Machines
The primary advantage of using 3D-FPGA over 2D-FPGA is that the vertical stacking of active layers reduce the Manhattan distance between the components in 3D-FPGA than when placed...
R. Manimegalai, E. Siva Soumya, V. Muralidharan, B...
VLSID
2005
IEEE
114views VLSI» more  VLSID 2005»
12 years 3 months ago
Lithography Driven Layout Design
Manish Garg, Laurent Le Cam, Matthieu Gonzalez
VLSID
2005
IEEE
127views VLSI» more  VLSID 2005»
12 years 3 months ago
Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model
One of the emerging challenges in formal property verification (FPV) technology is the problem of deciding whether sufficient properties have been written to cover the design in...
Sayantan Das, Ansuman Banerjee, Prasenjit Basu, Pa...
VLSID
2005
IEEE
107views VLSI» more  VLSID 2005»
12 years 3 months ago
Design, Testing, and Applications of Digital Microfluidics-Based Biochips
Microfluidics-based biochips offer a promising platform for massively parallel DNA analysis, automated drug discovery, and real-time biomolecular recognition. The first part of th...
Krishnendu Chakrabarty
VLSID
2005
IEEE
97views VLSI» more  VLSID 2005»
12 years 3 months ago
Q-PREZ: QBF Evaluation Using Partition, Resolution and Elimination with ZBDDs
In recent years, there has been an increasing interest in Quantified Boolean Formula (QBF) evaluation, since several VLSI CAD problems can be formulated efficiently as QBF insta...
Kameshwar Chandrasekar, Michael S. Hsiao
VLSID
2005
IEEE
124views VLSI» more  VLSID 2005»
12 years 3 months ago
Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder
In this paper, we have proposed a design technique for the reversible circuit of Binary Coded Decimal (BCD) adder. The proposed circuit has the ability to add two 4bits binary var...
Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury
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