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VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
14 years 4 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
VLSID
2007
IEEE
146views VLSI» more  VLSID 2007»
14 years 4 months ago
Architecting Microprocessor Components in 3D Design Space
Interconnect is one of the major concerns in current and future microprocessor designs from both performance and power consumption perspective. The emergence of three-dimensional ...
Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang 0004,...
VLSID
2007
IEEE
152views VLSI» more  VLSID 2007»
14 years 4 months ago
An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect
With scaling of CMOS technologies, sub-threshold, gate and reverse biased junction band-to-band-tunneling leakage have increased dramatically. Together they account for more than 2...
Ashesh Rastogi, Wei Chen, Alodeep Sanyal, Sandip K...
VLSID
2007
IEEE
130views VLSI» more  VLSID 2007»
14 years 4 months ago
Impact of NBTI on FPGAs
Device scaling such as reduced oxide thickness and high electric field has given rise to various reliability concerns. One such growing issue of concern is the degradation of PMOS...
Krishnan Ramakrishnan, S. Suresh, Narayanan Vijayk...
VLSID
2007
IEEE
97views VLSI» more  VLSID 2007»
14 years 4 months ago
Efficient Microprocessor Verification using Antecedent Conditioned Slicing
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraha...
VLSID
2007
IEEE
103views VLSI» more  VLSID 2007»
14 years 4 months ago
Impact of Modern Process Technologies on the Electrical Parameters of Interconnects
Abstract-- This paper presents the results obtained from an experimental study of the impact of modern process technologies on the electrical parameters of interconnects. Variation...
Debjit Sinha, Jianfeng Luo, Subramanian Rajagopala...
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
14 years 4 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...
VLSID
2007
IEEE
99views VLSI» more  VLSID 2007»
14 years 4 months ago
Low Power Implementation for Minimum Norm Sorting and Block Upper Tri-angularization of Matrices used in MIMO Wireless Systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme...
VLSID
2007
IEEE
100views VLSI» more  VLSID 2007»
14 years 4 months ago
Hardware Efficient Piecewise Linear Branch Predictor
Piecewise linear branch predictor has been demonstrated to have superior prediction accuracy; however, its huge hardware overhead prevents the predictor from being practical in the...
Jiajin Tu, Jian Chen, Lizy K. John
VLSID
2007
IEEE
91views VLSI» more  VLSID 2007»
14 years 4 months ago
Creating a Culture of Innovation
Wim Roelandts