VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
This paper presents an algorithm based on testability measurement for test point insertion of mixed-signal circuits. Two transfer function models compatible with analog models are...
VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
1 While multichip module technology has been developed for high performance IC applications, the technology is not widely adopted due to economical reasons. One of the reasons that...
VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
This paper presents a new fault-tolerance technique for cache memories. Current fault-tolerance techniques for caches are limited either by the number of faults that can be tolera...
VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
Sequential test generators fail to yield tests for some stuck-at-faults because they are unable to reach certain states necessary for exciting propagating these target faults. Add...
VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
This paper describes an approach to design error diagnosis and correction in combinational digital circuits. Our approach targets small errors introduced during the design process...
VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
This paper presents a new technique for on-line consistency checking of embedded DRAMs. The basic idea is to use the periodic refresh operation for concurrently computing a test c...
VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
High-level test pattern generation is today a widely investigated research topic. The present paper proposes a fully automated, simulation-based ATPG system, to address test patte...
VTS
1999
IEEE
13 years 8 months ago
1999
IEEE
This paper presents adaptive techniques for improving delay fault diagnosis. These techniques reduce the search space for direct probing which can save a lot of time during failur...