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VTS
2002
IEEE
113views Hardware» more  VTS 2002»
13 years 9 months ago
Testing Static and Dynamic Faults in Random Access Memories
The ever increasing trend to reduce DPM levels of memories requires tests with very high fault coverages. The very important class of dynamic fault, therefore cannot be ignored an...
Said Hamdioui, Zaid Al-Ars, A. J. van de Goor
VTS
2002
IEEE
108views Hardware» more  VTS 2002»
13 years 9 months ago
On Using Efficient Test Sequences for BIST
High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single Inp...
René David, Patrick Girard, Christian Landr...
VTS
2002
IEEE
135views Hardware» more  VTS 2002»
13 years 9 months ago
A Self Calibrated ADC BIST Methodology
Hung-kai Chen, Chih-hu Wang, Chau-chin Su
VTS
2002
IEEE
124views Hardware» more  VTS 2002»
13 years 9 months ago
Approximating Infinite Dynamic Behavior for DRAM Cell Defects
Zaid Al-Ars, A. J. van de Goor
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
13 years 9 months ago
Test Pattern Generation for Signal Integrity Faults on Long Interconnects
In this paper, we present a test pattern generation algorithm aiming at signal integrity faults on long interconnects. This is achieved by considering the effect of inputs and par...
Amir Attarha, Mehrdad Nourani
VTS
2002
IEEE
106views Hardware» more  VTS 2002»
13 years 9 months ago
How Effective are Compression Codes for Reducing Test Data Volume?
Run-length codes and their variants have recently been shown to be very effective for compressing system-on-achip (SOC) test data. In this paper, we analyze the Golomb code, the c...
Anshuman Chandra, Krishnendu Chakrabarty, Rafael A...