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VTS
2006
IEEE
101views Hardware» more  VTS 2006»
12 years 6 months ago
Design Optimization for Robustness to Single Event Upsets
Abstract: An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU...
Quming Zhou, Mihir R. Choudhury, Kartik Mohanram
VTS
2006
IEEE
102views Hardware» more  VTS 2006»
12 years 6 months ago
Energy Efficient Software-Based Self-Test for Wireless Sensor Network Nodes
We consider self-testing of complete wireless nodes in the field through a low-energy software-based selftest (SBST) method. Energy consumption is optimized both for individual co...
Rong Zhang, Zeljko Zilic, Katarzyna Radecka
VTS
2006
IEEE
122views Hardware» more  VTS 2006»
12 years 6 months ago
Early, Accurate and Fast Yield Estimation through Monte Carlo-Alternative Probabilistic Behavioral Analog System Simulations
Monte Carlo analysis has so far been the corner stone for analog statistical simulations. Fast and accurate simulations are necessary for stringent time-to-market, design for manu...
Rasit Onur Topaloglu
VTS
2006
IEEE
122views Hardware» more  VTS 2006»
12 years 6 months ago
Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free Assumptions
We tackle the problem of fault-free assumptions in current PLB and interconnect built-in-self-test (BIST) techniques for FPGAs. These assumptions were made in order to develop stro...
Vishal Suthar, Shantanu Dutt
VTS
2006
IEEE
108views Hardware» more  VTS 2006»
12 years 6 months ago
Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing
Abstract— Numerous machine-learning-based test methodologies have been proposed in recent years as a fast alternative to the standard functional testing of mixed-signal/RF integr...
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
VTS
2006
IEEE
118views Hardware» more  VTS 2006»
12 years 6 months ago
X-IDDQ: A Novel Defect Detection Technique Using IDDQ Data
A statistical technique X-IDDQ for extracting defect information from IDDQ data is presented that is effective for detection of defects in ICs. The technique treats the IDDQ measu...
Ashutosh Sharma, Anura P. Jayasumana, Yashwant K. ...
VTS
2006
IEEE
116views Hardware» more  VTS 2006»
12 years 6 months ago
Combining Linear and Non-Linear Test Vector Compression Using Correlation-Based Rectangular Encoding
A technique is presented here for improving the compression achieved with any linear decompressor by adding a small non-linear decoder that exploits bit-wise and pattern-wise corr...
Jinkyu Lee, Nur A. Touba
VTS
2006
IEEE
95views Hardware» more  VTS 2006»
12 years 6 months ago
Integrated CMOS Power Sensors for RF BIST Applications
This paper presents the design and experimental results of fully integrated CMOS power sensors for RF built-in self-test (BIST) applications. Using a standard 0.18- m CMOS process...
Hsieh-Hung Hsieh, Liang-Hung Lu
VTS
2006
IEEE
133views Hardware» more  VTS 2006»
12 years 6 months ago
PEAKASO: Peak-Temperature Aware Scan-Vector Optimization
— In this paper, an algorithm for scan vector ordering, PEAKASO, is proposed to minimize the peak temperature during scan testing. Given a circuit with scan and the scan vectors,...
Minsik Cho, David Z. Pan
VTS
2006
IEEE
98views Hardware» more  VTS 2006»
12 years 6 months ago
Iterative OPDD Based Signal Probability Calculation
This paper presents an improved method to accurately estimate signal probabilities using ordered partial decision diagrams (OPDDs) [Kodavarti 93] for partial representation of the...
Avijit Dutta, Nur A. Touba
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