FPGA
2008
ACM
13 years 5 months ago
2008
ACM
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
ICCAD
1998
IEEE
13 years 8 months ago
1998
IEEE
Increases in delay due to coupling can have a dramatic impact on IC performance for deep submicron technologies. To achieve maximum performance there is a need for analyzing logic...
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
A compact delay model for series connected MOSFETs has been derived. This model enables accurate prediction of worst-case delay of different logic families such as dynamic logic. ...
ICCD
2003
IEEE
14 years 1 months ago
2003
IEEE
Analyzing the effect of crosstalk on delay is critical for high performance circuits. The major bottleneck in performing crosstalkinduced delay analysis is the high computational ...
VLSID
2004
IEEE
14 years 4 months ago
2004
IEEE
Reduction of worst-case delay and delay uncertainty due to capacitive coupling is a still unsolved problem in physical design. We describe a routing only layout solution - swizzli...