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SBACPAD
2015
IEEE
47views Hardware» more  SBACPAD 2015»
5 years 9 months ago
i-MIRROR: A Software Managed Die-Stacked DRAM-Based Memory Subsystem
This paper presents an operating system managed diestacked DRAM called i-MIRROR that mirrors high locality pages from the off-chip DRAM. Optimizing the problems of reducing cache ...
Jee Ho Ryoo, Karthik Ganesan, Yao-Min Chen, Lizy K...
SBACPAD
2015
IEEE
48views Hardware» more  SBACPAD 2015»
5 years 9 months ago
Watt Watcher: Fine-Grained Power Estimation for Emerging Workloads
—Extensive research has focused on estimating power to guide advances in power management schemes, thermal hot spots, and voltage noise. However, simulated power models are slow ...
Michael LeBeane, Jee Ho Ryoo, Reena Panda, Lizy Ku...
SBACPAD
2015
IEEE
46views Hardware» more  SBACPAD 2015»
5 years 9 months ago
Performance Characterization of Modern Databases on Out-of-Order CPUs
—Big data revolution has created an unprecedented demand for intelligent data management solutions on a large scale. While data management has traditionally been used as a synony...
Reena Panda, Christopher Erb, Michael LeBeane, Jee...
SBACPAD
2015
IEEE
51views Hardware» more  SBACPAD 2015»
5 years 9 months ago
Progressive Codesign of an Architecture and Compiler Using a Proxy Application
Abstract—The Active Memory Cube (AMC) is a novel nearmemory processor that exploits high memory bandwidth and low latency close to DRAM to execute scientific applications in an ...
Arpith C. Jacob, Ravi Nair, Tong Chen, Zehra Sura,...
SBACPAD
2015
IEEE
43views Hardware» more  SBACPAD 2015»
5 years 9 months ago
A Fault-Tolerance Protocol for Parallel Applications with Communication Imbalance
Abstract—The predicted failure rates of future supercomputers loom the groundbreaking research large machines are expected to foster. Therefore, resilient extreme-scale applicati...
Esteban Meneses, Laxmikant V. Kalé
SBACPAD
2015
IEEE
53views Hardware» more  SBACPAD 2015»
5 years 9 months ago
Intra-Clustering: Accelerating On-chip Communication for Data Parallel Architectures
Abstract—Modern computation workloads contain abundant Data Level Parallelism(DLP), which requires specialized data parallel architectures, such as Graphics Processing Units(GPUs...
Wen Yuan, Rahul Boyapati, Lei Wang, Hyunjun Jang, ...
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