Sciweavers

183 search results - page 10 / 37
» 3D-VOQ Switch Design and Evaluation
Sort
View
SIGCOMM
2010
ACM
14 years 12 months ago
Helios: a hybrid electrical/optical switch architecture for modular data centers
The basic building block of ever larger data centers has shifted from a rack to a modular container with hundreds or even thousands of servers. Delivering scalable bandwidth among...
Nathan Farrington, George Porter, Sivasankar Radha...
OSN
2011
14 years 2 months ago
A parallel iterative scheduler for asynchronous Optical Packet Switching networks
—This paper presents PI-OPS (Parallel-Iterative Optical Packet Scheduler) a parallel-iterative scheduler for asynchronous Optical Packet Switching nodes with optical buffering. O...
Pablo Pavón-Mariño, M. Victoria Buen...
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
15 years 8 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
SBCCI
2004
ACM
134views VLSI» more  SBCCI 2004»
15 years 5 months ago
An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage s...
Gabriella Trucco, Giorgio Boselli, Valentino Liber...
JILP
2000
87views more  JILP 2000»
14 years 11 months ago
Design and Analysis of Profile-Based Optimization in Compaq's Compilation Tools for Alpha
This paper describes and evaluates the profile-based optimizations in the Compaq C compiler tool chain for Alpha. The optimizations include superblock formation, inlining, command...
Robert S. Cohn, P. Geoffrey Lowney