The basic building block of ever larger data centers has shifted from a rack to a modular container with hundreds or even thousands of servers. Delivering scalable bandwidth among...
Nathan Farrington, George Porter, Sivasankar Radha...
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage s...
Gabriella Trucco, Giorgio Boselli, Valentino Liber...
This paper describes and evaluates the profile-based optimizations in the Compaq C compiler tool chain for Alpha. The optimizations include superblock formation, inlining, command...