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VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
16 years 2 days ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
FDL
2006
IEEE
15 years 5 months ago
Reusing Real-Time Systems Design Experience
To ensure correctness and performance of real-time embedded systems, early evaluation of properties is needed. Based on design experience for real-time systems and using the conce...
Oana Florescu, Jeroen Voeten, Marcel Verhoef, Henk...
CLUSTER
2000
IEEE
15 years 4 months ago
Contention-free Complete Exchange Algorithm on Clusters
To construct a large commodity clustec a hierarchical network is generally adopted for connecting the host muchines, where a Gigabit backbone switch connects a few commodity switc...
Anthony T. C. Tam, Cho-Li Wang
NOCS
2008
IEEE
15 years 6 months ago
Adding Slow-Silent Virtual Channels for Low-Power On-Chip Networks
In this paper, we introduce the use of slow-silent virtual channels to reduce the switching power of on-chip networks while keeping the leakage power small. Adding virtual channel...
Hiroki Matsutani, Michihiro Koibuchi, Daihan Wang,...
TROB
2008
93views more  TROB 2008»
14 years 11 months ago
Transparency in Port-Hamiltonian-Based Telemanipulation
After stability, transparency is the major issue in the design of a telemanipulation system. In this paper, we exploit the behavioral approach in order to provide an index for the ...
Cristian Secchi, Stefano Stramigioli, Cesare Fantu...