Sciweavers

442 search results - page 39 / 89
» A Flexible Generator Architecture for Improving Software Dep...
Sort
View
LCTRTS
2007
Springer
15 years 6 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
SIPS
2007
IEEE
15 years 6 months ago
Design and Analysis of LDPC Decoders for Software Defined Radio
Low Density Parity Check (LDPC) codes are one of the most promising error correction codes that are being adopted by many wireless standards. This paper presents a case study for ...
Sangwon Seo, Trevor N. Mudge, Yuming Zhu, Chaitali...
DAC
1998
ACM
16 years 23 days ago
Software Synthesis of Process-Based Concurrent Programs
We present a Petri net theoretic approach to the software synthesis problem that can synthesize ordinary C programs from processbased concurrent specifications without the need for...
Bill Lin
PLDI
2011
ACM
14 years 2 months ago
Systematic editing: generating program transformations from an example
Software modifications are often systematic—they consist of similar, but not identical, program changes to multiple contexts. Existing tools for systematic program transformati...
Na Meng, Miryung Kim, Kathryn S. McKinley
IWCMC
2006
ACM
15 years 5 months ago
Proposal for a cross-layer coordination framework for next generation wireless systems
Cross-Layer design has been the focus of several recent research efforts. Due to the highly variable nature of the links used in wireless communication systems and the resource-po...
Karim M. El Defrawy, Magda El Zarki, Mohamed M. Kh...