Sciweavers

1410 search results - page 251 / 282
» A Logic for Virtual Memory
Sort
View
VLDB
2004
ACM
144views Database» more  VLDB 2004»
15 years 5 months ago
Returning Modified Rows - SELECT Statements with Side Effects
SQL in the IBM® DB2® Universal Database™ for Linux®, UNIX®, and Windows® (DB2 UDB) database management product has been extended to support nested INSERT, UPDATE, and DELET...
Andreas Behm, Serge Rielau, Richard Swagerman
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
15 years 5 months ago
Automatic Generation of Simulation Monitors from Quantitative Constraint Formula
System design methodology is poised to become the next big enabler for highly sophisticated electronic products. Design verification continues to be a major challenge and simulat...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
ISLPED
2003
ACM
88views Hardware» more  ISLPED 2003»
15 years 5 months ago
Reducing data cache energy consumption via cached load/store queue
High-performance processors use a large set–associative L1 data cache with multiple ports. As clock speeds and size increase such a cache consumes a significant percentage of t...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
15 years 4 months ago
BISD: Scan-based Built-In self-diagnosis
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...
Melanie Elm, Hans-Joachim Wunderlich
ISCA
2010
IEEE
413views Hardware» more  ISCA 2010»
15 years 4 months ago
Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing
As CMOS scales beyond the 45nm technology node, leakage concerns are starting to limit microprocessor performance growth. To keep dynamic power constant across process generations...
Xiaochen Guo, Engin Ipek, Tolga Soyata