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VIS
2006
IEEE
214views Visualization» more  VIS 2006»
16 years 29 days ago
Hub-based Simulation and Graphics Hardware Accelerated Visualization for Nanotechnology Applications
The Network for Computational Nanotechnology (NCN) has developed a science gateway at nanoHUB.org for nanotechnology education and research. Remote users can browse through online...
Wei Qiao, Michael McLennan, Rick Kennell, David...
VLSISP
2010
148views more  VLSISP 2010»
14 years 10 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...
JFP
2006
91views more  JFP 2006»
14 years 11 months ago
A reflective functional language for hardware design and theorem proving
This paper introduces reFLect, a functional programming language with reflection features intended for applications in hardware design and verification. The reFLect language is st...
Jim Grundy, Thomas F. Melham, John W. O'Leary
BIOCOMP
2006
15 years 1 months ago
Performance of Sequence Alignment Bioinformatics Applications on General Purpose Processors: A Case Study
- Aligning specific sequences against other known sequences in a database is a central aspect of bioinformatics. New experimental data being added continuously to these databases n...
Pradeep Nair, Eugene John
SAC
2006
ACM
14 years 11 months ago
A new method of generating synchronizable test sequences that detect output-shifting faults based on multiple UIO sequences
The objective of testing is to determine the conformance between a system and its specification. When testing distributed systems, the existence of multiple testers brings out the...
Kai Chen, Fan Jiang, Chuan-dong Huang