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GLOBECOM
2008
IEEE
15 years 6 months ago
Blind Turbo Channel Estimation of QAM Signals Exploiting Code Constraints
—We present a blind turbo equalizer for QAM signals that exploits the statistics that a channel code imposes on the transmitted signal. The receiver is an adaptation of previous ...
André Fonseca dos Santos, Wolfgang Rave, Ge...
DATE
2007
IEEE
134views Hardware» more  DATE 2007»
15 years 6 months ago
Non-fractional parallelism in LDPC decoder implementations
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) decoding algorithm is gaining increased attention in communication standards and literatur...
John Dielissen, Andries Hekstra
SIPS
2007
IEEE
15 years 6 months ago
An Area-Efficient FPGA-Based Architecture for Fully-Parallel Stochastic LDPC Decoding
Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding...
Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gros...
DATE
2006
IEEE
219views Hardware» more  DATE 2006»
15 years 5 months ago
Low cost LDPC decoder for DVB-S2
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) algorithm is gaining increased attention in communication standards and literature. The ne...
John Dielissen, Andries Hekstra, Vincent Berg
101
Voted
SIPS
2006
IEEE
15 years 5 months ago
Partly Parallel Overlapped Sum-Product Decoder Architectures for Quasi-Cyclic LDPC Codes
Abstract— In this paper, we propose partly parallel architectures based on optimal overlapped sum-product (OSP) decoding. To ensure high throughput and hardware utilization effi...
Ning Chen, Yongmei Dai, Zhiyuan Yan