Sciweavers

1346 search results - page 145 / 270
» Alternating-time dynamic logic
Sort
View
EUROPAR
2001
Springer
15 years 10 months ago
Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
Toshinori Sato, Itsujiro Arita
PPDP
1999
Springer
15 years 9 months ago
Distributed Programming in a Multi-Paradigm Declarative Language
Curry is a multi-paradigm declarative language covering functional, logic, and concurrent programming paradigms. Curry’s operational semantics is based on lazy reduction of expre...
Michael Hanus
COMCOM
2006
101views more  COMCOM 2006»
15 years 5 months ago
A combined group/tree approach for scalable many-to-many reliable multicast
Abstract--In this paper we present the design, implementation, and performance analysis of Group-Aided Multicast (GAM), a scalable many-tomany reliable multicast transport protocol...
Wonyong Yoon, Dongman Lee, Hee Yong Youn, Seung-Ik...
ENTCS
2007
128views more  ENTCS 2007»
15 years 5 months ago
Optimisation Validation
We introduce the idea of optimisation validation, which is to formally establish that an instance of an optimising transformation indeed improves with respect to some resource mea...
David Aspinall, Lennart Beringer, Alberto Momiglia...
MJ
2008
67views more  MJ 2008»
15 years 5 months ago
Temperature-adaptive voltage tuning for enhanced energy efficiency in ultra-low-voltage circuits
Circuits optimized for minimum energy consumption operate typically in the subthreshold regime with ultra-low power-supply voltages. Speed of a subthreshold logic circuit is enhan...
Ranjith Kumar, Volkan Kursun