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LCTRTS
1999
Springer
15 years 4 months ago
Effective Exploitation of a Zero Overhead Loop Buffer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanj...
ARCS
2009
Springer
15 years 6 months ago
Empirical Performance Models for Java Workloads
Abstract. Java is widely deployed on a variety of processor architectures. Consequently, an understanding of microarchitecture level Java performance is critical to optimize curren...
Pradeep Rao, Kazuaki Murakami
AIEDU
2005
83views more  AIEDU 2005»
14 years 11 months ago
A Simulated Student Can Improve Collaborative Learning
This paper describes a Simulated Student architecture designed to detect and avoid three situations that decrease the benefits of learning in collaboration. These are off-topic con...
Aurora Vizcaíno
ISCC
2005
IEEE
179views Communications» more  ISCC 2005»
15 years 5 months ago
Micro Mobile MPLS: A New Scheme for Micro-mobility Management in 3G All-IP Networks
This article presents the Micro Mobile MPLS scheme, which is a new proposal for IP local mobility in wireless MPLS access networks. Our proposal is based on multiprotocol label sw...
Rami Langar, Samir Tohmé, Gwendal Le Grand
CC
2003
Springer
102views System Software» more  CC 2003»
15 years 5 months ago
Precision in Practice: A Type-Preserving Java Compiler
Popular mobile code architectures (Java and .NET) include verifiers to check for memory safety and other security properties. Since their formats are relatively high level, suppor...
Christopher League, Zhong Shao, Valery Trifonov