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CODES
1998
IEEE
15 years 4 months ago
Software timing analysis using HW/SW cosimulation and instruction set simulator
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...
Jie Liu, Marcello Lajolo, Alberto L. Sangiovanni-V...
LCTRTS
2009
Springer
15 years 6 months ago
Synergistic execution of stream programs on multicores with accelerators
The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. The StreamIt graphs describe task, da...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...
SBCCI
2009
ACM
188views VLSI» more  SBCCI 2009»
15 years 6 months ago
Low-power inter-core communication through cache partitioning in embedded multiprocessors
We present an application-driven customization methodology for energy-efficient inter-core communication in embedded multiprocessors. The methodology leverages configurable cach...
Chenjie Yu, Xiangrong Zhou, Peter Petrov
SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
15 years 5 months ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...
RE
1999
Springer
15 years 4 months ago
Bridging the Gap Between Past and Future in RE: A Scenario-Based Approach
Requirements Engineering (RE) investigates the impact of a future-oriented change vision, but the move towards this vision must consider a context heavily shaped by the past. As R...
Peter Haumer, Matthias Jarke, Klaus Pohl, Patrick ...